The present invention relates in general to integrated circuit packaging, and more particularly to an improved process for fabricating a premolded cavity integrated circuit package that includes a feature to inhibit mold contamination of the inner lead bonding area.
Cavity-type IC packages are useful in imaging devices such as CMOS imaging or CCD display applications for still or video cameras. The package includes a die at the base of a cavity and a clear lid epoxied on top. The use of a cavity-type IC is package is advantageous for high frequency applications as the gold interconnect wires between the die attach pad and the contacts span an air gap rather than travelling through mold compound. The air has a lower dielectric constant than the mold compound and therefore the electrical impedance of the gold wire is much lower when the wire runs through air rather than through the mold compound. Thus signal distortion at high frequencies is inhibited.
Prior art cavity-type IC packages include ceramic body IC packages such as the Ceramic PGA cavity package traditionally used for microprocessors. However, these packages are cost prohibitive.
Other prior art packages include ball grid array (BOA) packages for use in imaging or camera applications. These packages are fabricated with a rim of high viscosity epoxy and a glass lid placed thereon. Again, these packages are cost prohibitive as they employ a substrate rather than a less-expensive leadframe.
The PANDA PACK, a well-known QFP (Quad Flat Pack) cavity style package, provides an air gap spanned by the gold interconnect wires. However, the inner leads of these packages are not supported and the mold flash must be cleaned from the leads for the gold wire to stick to the inner leads during wire bonding. Cleaning and wire bonding is difficult and therefore is not always successful.
According to an aspect of the present invention there is provided a process for fabricating a cavity-type integrated circuit package. The process includes: supporting an interior portion of each of a plurality of leads, in a mold; supporting a die attach pad in said mold; molding a package body in said mold such that said leads extend from an interior cavity of said package body to an exterior thereof; mounting a semiconductor die to said die attach pad; wire bonding various ones of said leads to said semiconductor die; adding a fill material for covering at least a surface of said interior portion of said leads; and mounting a lid on said package body for enclosing said die in said cavity of said package body.
According to another aspect of the present invention there is provided a process for fabricating a cavity-type integrated circuit package. The process includes: supporting an interior portion of each of a plurality of leads, in a mold; supporting a die attach pad in said mold; molding a package body in said mold such that said leads extend from an interior of said package body to an exterior thereof; mounting a first semiconductor die in a first cavity of said package body, to a first side of said die attach pad; wire bonding various ones of said leads to said first semiconductor die; adding a fill material to substantially fill said first cavity of said body; mounting a second semiconductor die in a second cavity of said package body, to a second side of said die attach pad; wire bonding various ones of said leads to said second semiconductor die; adding a fill material to said second cavity for covering at least a surface of said interior portion of said leads; and mounting a lid on said package body for enclosing said second semiconductor die in said second cavity in said package body.
In yet another aspect of the present invention there is provided a cavity-type integrated circuit package. The package includes: a premolded package body; a plurality of leads, each lead extending from an interior of said package body to an exterior thereof; a first semiconductor die mounted to a first side of a die attach pad, in a first cavity of said package body; a first plurality of wire bonds connecting various ones of said leads and said first semiconductor die; a first fill material substantially filling said first cavity of said package body; a second semiconductor die mounted to a second side of said die attach pad in said package body; a second plurality of wire bonds connecting various ones of said leads and said second to semiconductor die; a second fill material covering a portion of said plurality of leads; and a lid for enclosing said second semiconductor die and said second plurality of wire bonds in said package body.
In one aspect of the invention, an air cavity in the interior of the package body and the clamped inner portion of the leads inhibits mold flash from contaminating a surface thereof, providing a clean wire bondable surface.